? semiconductor components industries, llc, 2008 march, 2008 - rev. 1 1 publication order number: nlu1gt04/d nlu1gt04 single inverter, ttl level lsttl-compatible inputs the nlu1gt04 minigate is an advanced cmos high-speed inverting buffer in ultra-small footprint. the device input is compatible with ttl-type input thresholds and the output has a full 5.0 v cmos level output swing. the nlu1gt04 input and output structures provide protection when voltages up to 7 v are applied, regardless of the supply voltage. features ? high speed: t pd = 3.8 ns (typ) @ v cc = 5.0 v ? low power dissipation: i cc = 1 a (max) at t a = 25 c ? ttl-compatible input: v il = 0.8 v; v ih = 2.0 v ? cmos-compatible output: v oh > 0.8 v cc ; v ol < 0.1 v cc @ load ? power down protection provided on inputs ? balanced propagation delays ? ultra-small packages ? these are pb-free devices v cc nc in a out y gnd 1 2 3 5 4 in a out y 1 figure 1. pinout (top view) figure 2. logic symbol 6 nc marking diagrams n or 2 = device marking m = date code http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information 1 udfn6 mu suffix case 517aa pin assignment 1 2 3 gnd nc in a 4 5nc out y function table l h ay h l 6v cc 1 1 1 ullga6 1.0 x 1.0 case 613ad ullga6 1.2 x 1.0 case 613ae ullga6 1.45 x 1.0 case 613af nm nm 2 m n m
nlu1gt04 http://onsemi.com 2 maximum ratings symbol parameter value unit v cc dc supply voltage -0.5 to +7.0 v v in dc input voltage -0.5 to +7.0 v v out dc output voltage -0.5 to +7.0 v i ik dc input diode current v in < gnd -20 ma i ok dc output diode current v out < gnd 20 ma i o dc output source/sink current 12.5 ma i cc dc supply current per supply pin 25 ma i gnd dc ground current per ground pin 25 ma t stg storage temperature range -65 to +150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c msl moisture sensitivity level 1 f r flammability rating oxygen index: 28 to 34 ul 94 v-0 @ 0.125 in v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) > 2000 > 200 n/a v i latchup latchup performance above v cc and below gnd at 125 c (note 5) 500 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. measured with minimum pad spacing on an fr4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow. 2. tested to eia / jesd22-a114-a. 3. tested to eia / jesd22-a115-a. 4. tested to jesd22-c101-a. 5. tested to eia / jesd78. recommended operating conditions symbol parameter min max unit v cc positive dc supply voltage 1.65 5.5 v v in digital input voltage 0 5.5 v v out output voltage 0 5.5 v t a operating free-air temperature -55 +125 c t/ v input transition rise or fall rate v cc = 3.3 v 0.3 v v cc = 5.0 v 0.5 v 0 0 100 20 ns/v
nlu1gt04 http://onsemi.com 3 dc electrical characteristics symbol parameter conditions v cc (v) t a = 25 c t a = +85 c t a = -55 c to +125 c unit min typ max min max min max v ih low-level input voltage 3.0 1.4 1.4 1.4 v 4.5 to 5.5 2.0 2.0 2.0 v il low-level input voltage 3.0 0.53 0.53 0.53 v 4.5 to 5.5 0.8 0.8 0.8 v oh high-level output voltage v in = v ih or v il i oh = -50 a 3.0 4.5 2.9 4.4 3.0 4.5 2.9 4.4 2.9 4.4 v v in = v ih or v il i oh = -4 ma i oh = -8 ma 3.0 4.5 2.58 3.94 2.48 3.80 2.34 3.66 v ol low-level output voltage v in = v ih or v il i ol = 50 a 3.0 4.5 0 0 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il i ol = 4 ma i ol = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 i in input leakage current 0 v in 5.5 v 0 to 5.5 0.1 1.0 1.0 a i cc quiescent supply current 0 v in v cc 5.5 1.0 20 40 a i cct quiescent supply current v in = 3.4 v 5.5 1.35 1.50 1.65 ma i opd output leakage current v out = 5.5 v 0.0 0.5 5.0 10 a ac electrical characteristics (input t r = t f = 3.0 ns) symbol parameter v cc (v) test condition t a = 25 c t a = +85 c t a = -55 c to +125 c unit min typ max min max min max t plh , t phl propagation delay, input a to output y 3.0 to 3.6 c l = 15 pf 5.0 10.0 11.0 13.0 ns c l = 50 pf 6.2 13.5 15.0 17.5 4.5 to 5.5 c l = 15 pf 3.8 6.7 7.5 8.5 c l = 50 pf 4.2 7.7 8.5 9.5 c in input capacitance 5 10 10 10.0 pf c pd power dissipation capacitance (note 6) 5.0 10 pf 6. c pd is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. average operating current can be obtained by the equation i cc(opr) = c pd ? v cc ? f in + i cc . c pd is used to determine the no-load dynamic power consumption: p d = c pd ? v cc 2 ? f in + i cc ? v cc.
nlu1gt04 http://onsemi.com 4 v cc gnd 50% 50% v cc a or b y t phl t plh figure 3. switching waveforms figure 4. test circuit *includes all probe and jig capacitance. a 1-mhz square input wave is recommended for propagation delay tests. c l* input output ordering information device package shipping ? nlu1gt04mutcg udfn6 (pb-free) 3000 / tape & reel nlu1gt04amx1tcg ullga6, 1.45 x 1.0, 0.5p (pb-free) 3000 / tape & reel nlu1gt04bmx1tcg ullga6, 1.2 x 1.0, 0.4p (pb-free) 3000 / tape & reel NLU1GT04CMX1TCG ullga6, 1.0 x 1.0, 0.35p (pb-free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
nlu1gt04 http://onsemi.com 5 package dimensions udfn6, 1.2x1.0, 0.4p case 517aa-01 issue c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d bottom view b e 6x 0.10 b 0.05 a c c l 5x note 3 2x 0.10 c pin one reference top view 2x 0.10 c 10x a a1 (a3) 0.08 c 0.10 c c seating plane side view l2 1 3 4 6 dim min max millimeters a 0.45 0.55 a1 0.00 0.05 a3 0.127 ref b 0.15 0.25 d 1.20 bsc e 1.00 bsc e 0.40 bsc l 0.30 0.40 l1 0.00 0.15 l1 detail a bottom view (optional) 0.40 0.50 mounting footprint* dimensions: millimeters 0.22 6x 0.42 6x 1.07 0.40 pitch *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
nlu1gt04 http://onsemi.com 6 package dimensions ullga6 1.0x1.0, 0.35p case 613ad-01 issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 4. a maximum of 0.05 pull back of the plated terminal from the edge of the package is allowed. a b e d bottom view b e 6x 0.10 b 0.05 a c c l 5x note 3 0.10 c pin one reference top view 0.10 c 6x a a1 0.05 c 0.05 c c seating plane side view l1 1 3 4 6 dim min max millimeters a --- 0.40 a1 0.00 0.05 b 0.12 0.22 d 1.00 bsc e 1.00 bsc e 0.35 bsc l 0.25 0.35 l1 0.30 0.40 note 4 soldermask defined* dimensions: millimeters 0.22 5x 0.48 6x 1.18 0.53 pitch *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 0.35 1 mounting footprint pkg outline
nlu1gt04 http://onsemi.com 7 package dimensions ullga6 1.2x1.0, 0.4p case 613ae-01 issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 4. a maximum of 0.05 pull back of the plated terminal from the edge of the package is allowed. a b e d bottom view b e 6x 0.10 b 0.05 a c c l 5x note 3 0.10 c pin one reference top view 0.10 c 6x a a1 0.05 c 0.05 c c seating plane side view l1 1 3 4 6 dim min max millimeters a --- 0.40 a1 0.00 0.05 b 0.15 0.25 d 1.20 bsc e 1.00 bsc e 0.40 bsc l 0.25 0.35 l1 0.35 0.45 note 4 soldermask defined* dimensions: millimeters 0.26 5x 0.49 6x 1.24 0.53 pitch *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 0.40 1 mounting footprint pkg outline
nlu1gt04 http://onsemi.com 8 package dimensions ullga6 1.45x1.0, 0.5p case 613af-01 issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 4. a maximum of 0.05 pull back of the plated terminal from the edge of the package is allowed. a b e d bottom view b e 6x 0.10 b 0.05 a c c l 5x note 3 0.10 c pin one reference top view 0.10 c 6x a a1 0.05 c 0.05 c c seating plane side view l1 1 3 4 6 dim min max millimeters a --- 0.40 a1 0.00 0.05 b 0.15 0.25 d 1.45 bsc e 1.00 bsc e 0.50 bsc l 0.25 0.35 l1 0.30 0.40 note 4 soldermask defined* dimensions: millimeters 0.30 5x 0.49 6x 1.24 0.53 pitch *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 0.50 1 mounting footprint pkg outline on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 nlu1gt04/d minigate is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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